The present invention relates generally to storage of digital data by means of analog storage and more specifically discrete analog storage.
The common practice for storing multi-bit digital data by means of discrete analog media is carried out by allocation of distinguishable levels of voltage/current to numerical multi-bit values associated with the stored information per cell. The amount of data/bits stored in each cell is a function of the number of levels given as a value m, where m is equal or less than log2(M), where M is the number of the levels. This is also referred to as quantization or multi-level storage.
The number of levels (which contains the multi-bit information) stored in each cell is limited by the amount of uncertainty in the values of the levels when read from the cell during the reading process (the uncertainty may be referred to as storage noise). This difference between the write and read values might be such that a different value from the one originally written may be interpreted in the read process, which can cause an error. As the number of levels assigned to a cell increases, the probability of errors grows as well. To allow an accurate recovery of the original data, ECC (Error Control Coding) means are employed.
Various applications require different requirements of probability for errors. Thus flexibility in the storage process is advantageous. When more errors are allowed, the number of distinct storage values allocated may be increased, which derives higher number of bits stored per cell.
It is an object of the present invention to provide digital data storage with discrete memory cells. A storage memory is provided for storing digital data which includes digital signal processing (DSP) means for orthogonally transforming a digital data bit stream having a stored data component so as to provide improved data power; means for converting the transformed digital data to form analog data; and discrete analog memory means for storing the analog data.
In one preferred embodiment, the present invention provides means to trade Ns (discrete analog storage media noise) with Np (process contributed noise), thus allowing for storage of more bits per memory cell than the amounts attainable by the common practice. The storage media may be of any analog type, and even used with continuous analog data storage. Analog storage is referred here as the general case that describes all cases which store more than one bit per cell or the storage media is capable of storing more binary levels (more than two levels.)
The present invention takes advantage of coding the data for storage by means of orthogonal vectors (Dictionary of Science and Technology, by Wordsworth Editions Ltd, 1995, ISBN 1-85326-351-6, page 634), similar to the use of such means in Communications. Actually, every implementation used in communications system to improve Signal-to-Noise-Ratio of discrete data sequences, is applicable for discrete analog storage.
By transforming the digital data prior to storage and store the transformed data as analog data, results an improvement in total S/N (Signal to Noise ratio), allowing for better utilization of discrete analog memory when compared with the implementation of conventional approaches. The better utilization is measured by the average amount of bits of data stored in each memory cell.
The present invention may be implemented by using various means of data transformation. It is important to distinguish between this step and ECC (Error Control Coding) means which are allowing for the recovery of signal/data in noise, without the improvement of S/N. Means of ECC are applicable here as complementary means to cope with errors in the digital data after the inverse transformation.
The process has two main steps:
1. Error Correction Control.
2. Transformation of the resulting bit/word stream.
The reason for mentioning of ECC with the present invention is because it needs to be properly implemented with the suggested new processing. The application of this means may be carried out by conventional means, but it is clear that new techniques will be developed to take advantage of the a priori known inverse transformed data.
After applying ECC and adding the required bits/data, the resulting bit/data streams are organized in blocks of n words each, with m bits in each word. Contrary to conventional implementation that stores these words to n discrete analog cells, the present invention suggests that these n data values will be transformed to form a new block of nxe2x80x2 words with mxe2x80x2 bits each. The resulting block of data is stored in nxe2x80x2 discrete analog memory cells. The selection of the Transformation, n, m, nxe2x80x2 and mxe2x80x2 is made in such way to improve S/Ns (Signal to Storage Noise ratio) while maintaining low processing noise (Np), where Ns is the noise generated by the storage media and is added (or multiplied) to the analog values during the read process. Ns is a function of various arguments such as: process, technology, temperature, time, radiationxe2x80x94usually given as probability distribution function.
The Transformation techniques may vary in many ways and may be selected from known functions such as: FFT/DFT (complex or real), DCT, Hartley (FHT), Wavelets, Chebyshev Polynomials, Fractals and the like. The selection of the Transformation (and n, m, nxe2x80x2 and mxe2x80x2) is done to allow the addition of processing noise (Np) to storage noise (Ns), in controlled manner, thus the total noise levels after the processing will be below the storage noise (Ns). Other considerations are issues related to required BER (Bit Error Rate) and ECC.
Since the exact contribution of the processing noise may be computed before the actual storage of the data, further improvement may be gained by optimizing the ECC (Error Control Coding) means, and minimize the overhead contributed by the ECC to achieve a certain BER (Bit Error Rate).